SBC2000-188

General Information

The SBC2000-188 is a low cost, 16 bit, low power single board computer. Onboard peripheral support includes external keypad, alphanumeric LCD, audio transducer and onboard battery backable Real Time Clock. Two PWM channels and four interrupt inputs are available on the BUS connector.

Onboard memory consists of socketed byte wide boot ROM or byte wide flash memory and byte wide battery backable RAM. In addition to the microprocessor memory, a serial EEPROM can store setup and configuration parameters. Frequently updated process parameters may be stored in additional RAM that is part of the onboard Real Time Clock. The RTC and its internal RAM are battery backable independently from the main RAM.

The basic onboard functions can be expanded via external bus, VAST and one reconfigurable asynchronous channel. The external bus is 8 bits wide.

Battery Backed RAM, "BB"

Onboard RAM may be battery backed from an external battery if "BB" is installed between pins 1-2. If battery backed RAM is not required, install "BB" between pins 2-3. Not battery backing RAM (pins 2-3) will result in lowest power consumption, especially when the device is in the hibernate low power mode.

The Real Time Clock and its internal RAM will remain connected to the standby power source whether or not the main RAM is enabled for battery backup.

The factory setting is battery backing disabled (pins 2-3 shorted).

Watchdog, "WD"

The external 1.5 second watchdog timer is defeated by not installing the WD jumper.

The watchdog will bring the SBC2000-188 out of the power-down mode if the WD jumper is installed between pins 1-2.

The watchdog must be reset by a VAST transfer every 1.5 seconds if the jumper is placed between pins 2-3. If this is not done the SBC2000-188 will reset. The factory setting is no jumper installed.

Hibernate "HIB"

The Hibernate jumper is used to allow timed powerdowns with a switchable power supply. If a switchable power supply is connected to the SBC2000-188, calls to hibernate() in the Vesta C Library or Vesta Basic will shut down the power supply for a preprogrammed interval. The HIB jumper must be removed in this case.

If you are not using a switchable supply, installing this jumper will allow you to enter the equivalent of sleep mode for the duration of the power down interval. See the Power Modes section below for descriptions of sleep and hibernate modes. If neither a switchable power supply or the hibernate jumper are installed and you enter hibernate mode, the SBC2000 will shut down until it is manually reset.

"485"

The "485" adaptor connector must have a jumper from pins 5-6 installed unless the optional RS-485 adaptor module is plugged into this connector. If no jumper or adaptor is installed on this connector, the SBC2000 will be unable to receive data on the COM port. This jumper is installed at the factory.

Power Modes

Normal

Normal operation will consume approximately 115 mA of power. The SBC2000-188 requires a single 5 VDC supply rated at 200 mA. Lower power modes are supported. Battery backup current to the onboard RAM and RTC are supplied via pin 3 of the PWR connector and is not included in the power consumption figures. The RTC will consume approximately 10 to 20 uA of current during backup. Battery backup of RAM can be defeated with the "BB" jumper.

Nap

The nap mode of operation will reduce the power consumption. During nap mode, all peripherals are active. Normal mode will resume upon the application of any internal or external interrupt (including the UART.) Nap mode can be entered via a call to to the nap() procedure in the Vesta C Library or Vesta Basic.

Sleep

The sleep mode of operation shuts down the entire processor. Only a non-maskable interrupt (NMI) signal will wake it up again without a reset. No peripherals are active during sleep mode. Sleep mode can be entered via a call to to the sleep() procedure in the Vesta C Library or Vesta Basic.

Hibernate

Hibernate mode provides the lowest power consumption of all low power modes. Hibernate mode also has a software programmable low power time interval. If you are using a switchable power supply, the supply is shut down for the duration of the hibernate interval. In this state power is consumed only by battery backed components through the Vstby pin (pin 4) of the power connector. Note that when power is restored, it is identical to a board reset. Your code will start over from the beginning.

If you are not using a switchable supply then the HIB jumper should be installed. In this configuration, hibernate mode is identical to sleep mode, except that the board will wake up after the programmed power down interval. Your code will continue execution where it left off.

If you have not installed either a switchable supply or the HIB jumper, entering hibernate mode will put the SBC2000 into a mode much like sleep mode, but only a board reset will wake it up.

Low Power Mode Comparison

The following data is taken with an SBC2000-188 operating at 20 MHz with 128 Kbytes of RAM, 128 Kbytes of ROM, 4k bytes of EEPROM, and a Real Time Clock. Current is monitored through the power input (PWR connector pin 2) and the standby power input (PWR connector pin 4). These figures are with the LED illuminated (it adds about 5 mA).

Indicators

LED

The single LED on the SBC2000-188 indicates the state of bit 7 of IO port 1 on the 80188EB processor. The LED is illuminated when p1.7 is low. The optional RS-485 adaptor is in the receive mode when the LED is illuminated.

P1.7 is used to implement "push to talk" (PTT) logic when an RS-485 adaptor is installed on the COM 485 connector. With an adaptor installed, an illuminated LED indicates receive mode. If no such adaptor is installed, you are free to use the LED however you like. It can be controlled by manipulating p1.7 directly, or by toggling PTT via the comm() procedure in the Vesta C library or in Vesta Basic.

Memory on the SBC2000-188

SBC2000-188 Memory Map

The memory map of the SBC2000-188 spans 1 Megabyte. Within this space three regions exist. The first is RAM. The last is for ROM or flash memory. The second fills any space remaining in between the first and third regions.

The following table shows the three regions.

The processor provides an additional 64k bytes of IO space. IO space uses a separate set of read/write lines, so it is not mapped into memory space.

Boot ROM

The SBC2000-188 boot ROM is a socketed byte wide device. The boot ROM is active for the topmost portion of memory corresponding to its size. The access time requirement for boot ROM is tabulated below.

Boot ROM can be 128k, 256k, or 512k bytes. Typical part numbers are 27C010, 27C020, and 27C040 respectively. All Vesta ROMmed languages use one wait state in the boot ROM.

Battery Backable RAM

RAM is available in three sizes: 32k, 128k and 512k bytes.

The onboard RAM may be battery backed by connecting the positive terminal of an external 3.5 to 5.0 Volt battery to pin 4 of the power connector. The minus terminal of the battery is grounded (pin 1 of the power connector).

The specification of standby current for RAM devices varies widely. Typical backup current is less than 10 uA. However, worst case specification currents can be as high as 2 mA. A "typical worst case" current is 100 uA in the battery backed state. A battery consisting of 3 "AA" cells (nominally 1 Ahr, 4.5 Volts) will backup the RAM for 10,000 hours.

Current from the external battery is supplied through an onboard diode. This prevents the SBC2000-188 from overcharging any battery attached.

Flash

Flash memory is available in 512K devices.

Flash memory is accessible as an 8 bit byte read or write. Flash memory is similar to EPROM in that "1" bits may be written as "0" but a "0" cannot be written to a "1" until the device is erased. Although any byte is accessible as a write operation, erasing must be done on a sector basis. Vesta software drivers organize the physical sectors into 64k byte logical sectors. Erasing a sector typically takes less than 2 seconds, but may take as long as 30 seconds.

The flash memory on the SBC2000-188 is rated at a minimum of 100,000 write cycles.

EEPROM

The serial EEPROM is designed to hold frequently updated operational parameters such as last operator settings or calibration factors. EEPROM is available in various sizes ranging from 128 bytes to 8K bytes. Data can be modified on a byte by byte basis. The device is rated for 1,000,000 cycles.

Relative Speed

Vesta software enforces 0 wait state access to RAM and 1 wait state access to ROM or flash. Intel estimates that the performance degradation between these two access times is approximately 20% for a bus intensive application.

Interrupts

There are 5 interrupt lines available on the SBC2000-188. They are allocated according to the following table.

Power on the -188

The power connector supplies primary power at ground and +5. Standby power is supplied via pin 4 to the RTC and RAM. Standby power is 3.5V < Vstby <5.0V. The PWRON* signal allows the SBC2000-188 to switch on and off its own main power. PWRON* will go low to turn on an external power supply.

DEV Connector

The Development connector supplies RS-232 level signals at up to 115k Baud from CPU UART #1. Note that there is no output from this port unless it is connected to valid RS-232 levels, as from another serial port.

COM Connector

The Communications connector supplies RS-232 signals at up to 115k Baud from CPU UART #0. Note that there is no output from this port unless it is connected to valid RS-232 levels, as from another serial port.

VAST Connector

The Vesta Addressable Synchronous Transfer connector allows synchronous serial bus expansion to VAST peripherals.

LCD Connector

The LCD is interfaced in the "4-bit" mode. The LCD contrast voltage, Vo, can be adjusted using the onboard trimpot (R4) for any voltage between +5 and ground.

Keypad Connector

The KEYPAD is a standard 4 x 4 matrix type.

485 Connector

The "485" connector allows attachment of optional serial adaptor boards to convert the "COM" port to RS-485, RS-422 or IrDA standard. Normally, pins 5 to 6 are jumpered to activate RS-232 levels on the "COM" connector.

Beep Connector

The BEEP connector provides easy access to timer #0 output, used by default for audio tone generation. This line is also used as the BAUDCLK signal if the optional IrDA adaptor is connected to the 485. This function may preclude the use of Timer output 1 as an audio source.

External Bus Connector, J1AB

The external bus connector is an extension of the microprocessor data, address and control bus. In addition, unused direct control signals are available. If you wish to use or reconfigure any microprocessor I/O signals consult the Intel 80188EB manual.

Mounting holes and the J1AB bus connector are per PC/104 standard. The signals present on connector J1AB do not conform to the PC/104 standard. However, the data bus, address bus and read/write strobes do conform to the standard, allowing the SBC2000-188 to work with many PC/104 modules.

A maximum of 4 external peripherals may be attached to J1AB.

SBC2000-188 Mating Connectors

SBC2000-188 Dimension Drawing
- Dimensions are in inches.

SBC2000-188 Schematic, Page 1

SBC2000-188 Schematic, Page 2